Integrated circuit and forming method thereof

• Main Authors: ZONGHAN ZHUANG, ZHANG RONGHONG, WANG ZHIHAO, CHEN SHICHENG, JIANG GUOCHENG, YAO QIANNING, LIN ZHICHANG
• Format: Patent
• Language: Chinese; English
• Published: 15.11.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

An integrated circuit and a method of forming the same are provided. In one embodiment, an integrated circuit includes a first nanostructure transistor including: a plurality of first semiconductor nanostructures over a substrate; and a source/drain region in contact with each of the first semiconductor nanostructures. The integrated circuit includes a second nanostructure transistor including: a plurality of second semiconductor nanostructures; and a second source/drain region in contact with the one or more second semiconductor nanostructures, but not in contact with the one or more other second semiconductor nanostructures. 本发明的实施例提供了集成电路及其形成方法。集成电路包括第一纳米结构晶体管，第一纳米结构晶体管包括：多个第一半导体纳米结构，位于衬底上方；和源极/漏极区，与每个第一半导体纳米结构接触。集成电路包括第二纳米结构晶体管，第二纳米结构晶体管包括：多个第二半导体纳米结构；和第二源极/漏极区，与一个或者多个第二半导体纳米结构接触，但是不与一个或者多个其他第二半导体纳米结构接触。