Semiconductor device layout structure and forming method thereof

• Main Authors: WANG HUANCHEN, CHEN SHICHANG, CHEN XING, ZHANG ZHEN
• Format: Patent
• Language: Chinese; English
• Published: 02.09.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention provides a semiconductor device layout structure and a forming method thereof, a redundant pattern region of the semiconductor device layout structure is provided with at least two first redundant patterns and at least two second redundant patterns, each first redundant pattern comprises a first redundant active region pattern which is the same as an active region pattern of a device pattern region, and each second redundant pattern comprises a second redundant active region pattern which is the same as an active region pattern of a device pattern region; the at least two first redundant gate patterns are located on the first redundant active region pattern and are the same as the gate patterns of the device pattern region, and each second redundant pattern comprises a second redundant active region pattern and a second redundant gate pattern located on the second redundant active region pattern; the projection of the second redundant gate pattern is in the projection of the second redundant act