I2C link system based on CPLD and server

The invention discloses an I2C link system based on a CPLD (Complex Programmable Logic Device) and a server. The system comprises a first mainboard, downstream equipment and a CPLD chip, a first I2C signal of the first mainboard is transmitted to the CPLD chip, the CPLD chip performs level shift on...

Full description

Saved in:
Bibliographic Details
Main Author BAI HANBING
Format Patent
LanguageChinese
English
Published 08.02.2022
Subjects
Online AccessGet full text

Cover

Loading…
Abstract The invention discloses an I2C link system based on a CPLD (Complex Programmable Logic Device) and a server. The system comprises a first mainboard, downstream equipment and a CPLD chip, a first I2C signal of the first mainboard is transmitted to the CPLD chip, the CPLD chip performs level shift on the received first I2C signal, and after logic processing, the corresponding first I2C signal is transmitted to the corresponding downstream equipment through a multiplexer in the CPLD chip. The server is configured with the system. The I2C signal of the mainboard is transmitted to the CPLD chip, the CPLD chip performs logic processing, and the corresponding I2C signal is transmitted to the corresponding downstream equipment through the multiplexer of the CPLD chip, so that the CPLD chip replaces numerous voltage level conversion chips and IO expansion chips, a large amount of board card space is saved, board card design is facilitated, and design cost is saved. 本发明公开一种基于CPLD的I2C链路系统及服务器,系统包括第一主板、下游设备和CPLD芯片;第一主板的第
AbstractList The invention discloses an I2C link system based on a CPLD (Complex Programmable Logic Device) and a server. The system comprises a first mainboard, downstream equipment and a CPLD chip, a first I2C signal of the first mainboard is transmitted to the CPLD chip, the CPLD chip performs level shift on the received first I2C signal, and after logic processing, the corresponding first I2C signal is transmitted to the corresponding downstream equipment through a multiplexer in the CPLD chip. The server is configured with the system. The I2C signal of the mainboard is transmitted to the CPLD chip, the CPLD chip performs logic processing, and the corresponding I2C signal is transmitted to the corresponding downstream equipment through the multiplexer of the CPLD chip, so that the CPLD chip replaces numerous voltage level conversion chips and IO expansion chips, a large amount of board card space is saved, board card design is facilitated, and design cost is saved. 本发明公开一种基于CPLD的I2C链路系统及服务器,系统包括第一主板、下游设备和CPLD芯片;第一主板的第
Author BAI HANBING
Author_xml – fullname: BAI HANBING
BookMark eNrjYmDJy89L5WTQ8DRyVsjJzMtWKK4sLknNVUhKLE5NUcjPU3AO8HFRSMxLUShOLSpLLeJhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfHOfoaGJgZGBmZmlo7GxKgBAA-7KIE
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
Physics
DocumentTitleAlternate 一种基于CPLD的I2C链路系统及服务器
ExternalDocumentID CN114020669A
GroupedDBID EVB
ID FETCH-epo_espacenet_CN114020669A3
IEDL.DBID EVB
IngestDate Fri Jul 19 14:28:10 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language Chinese
English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_CN114020669A3
Notes Application Number: CN202111176950
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220208&DB=EPODOC&CC=CN&NR=114020669A
ParticipantIDs epo_espacenet_CN114020669A
PublicationCentury 2000
PublicationDate 20220208
PublicationDateYYYYMMDD 2022-02-08
PublicationDate_xml – month: 02
  year: 2022
  text: 20220208
  day: 08
PublicationDecade 2020
PublicationYear 2022
RelatedCompanies SUZHOU INSPUR INTELLIGENT TECHNOLOGY CO., LTD
RelatedCompanies_xml – name: SUZHOU INSPUR INTELLIGENT TECHNOLOGY CO., LTD
Score 3.5128994
Snippet The invention discloses an I2C link system based on a CPLD (Complex Programmable Logic Device) and a server. The system comprises a first mainboard, downstream...
SourceID epo
SourceType Open Access Repository
SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Title I2C link system based on CPLD and server
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220208&DB=EPODOC&locale=&CC=CN&NR=114020669A
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1bS8MwFD7MeX3Tqui8EEGKL8XQ29KHIi5tmeK6IlP2NpJeUB_asVYEf71J7Jwv-ppALge-fCfJOd8BuOSWi61-7hge44VhZ5gYnFvMwCYT_CU4DmOZ4DyK3eGTfT91ph14W-bCKJ3QDyWOKBCVCrw36ryerx6xAhVbWV_zV9FU3UQTP9Db27FpypqTejDww2QcjKlOqU9jPX70hduPpXK5d7sG69KNljr74fNAZqXMf1NKtAsbiRitbPag8_miwTZdVl7TYGvUfnhrsKkiNNNaNLYorPfh6s6kSP68om8dZiSpKENViWjyECBWZki-teaLA7iIwgkdGmLy2c9OZzRerdM6hG5ZlfkRIM_mTkZS23Vyz2ZFnzgCNkVWMMxywol9DL2_x-n913kCO9JqKgyZnEK3WbznZ4JlG36uzPMFfdl-hw
link.rule.ids 230,309,786,891,25594,76904
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LS8NAEB5qfdSbVovW1woSvASXPNrkEMRuElpN0iJRegu7TYJ6SEoTEfz17q6t9aLXWdjHwLffPma-Abhieg_r_cxUbcpy1UixpTKmUxVrlPMX5ziMRYJzGPWGT8b91Jw24G2VCyN1Qj-kOCJH1IzjvZb79Xz9iOXK2Mrqhr1yU3nrx46rLG_HmiZqTiruwPEmY3dMFEIcEinRo8OP_Vgol9t3G7DZ51dCobPvPQ9EVsr8N6X4e7A14b0V9T40Pl_a0CKrymtt2AmXH95t2JYRmrOKG5corA7geqQRJH5e0bcOMxJUlKKyQGQSuIgWKRJvrdniEC59LyZDlQ-e_Kw0IdF6nnoHmkVZZEeAbIOZqTUzemZmGzTvWyaHTZ7mFNPMYpZxDN2_--n-13gBrWEcBkkwih5OYFd4UIYkW6fQrBfv2Rln3JqdS1d9AY6VgXI
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=I2C+link+system+based+on+CPLD+and+server&rft.inventor=BAI+HANBING&rft.date=2022-02-08&rft.externalDBID=A&rft.externalDocID=CN114020669A