METHODS OF MINIMIZING WAFER BACKSIDE DAMAGE IN SEMICONDUCTOR WAFER PROCESSING
The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate support includes a body comprising a substrate chucking surface, an electrode disposed within the body, a plurality of substrate supporting f...
Saved in:
Main Authors | , , , |
---|---|
Format | Patent |
Language | Chinese English |
Published |
01.01.2021
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate support includes a body comprising a substrate chucking surface, an electrode disposed within the body, a plurality of substrate supporting features formed on the substrate chucking surface, wherein the number of substrate supporting features increases radially from a center of the substrate chucking surface to an edge of the substrate chucking surface, and a seasoning layer formed on the plurality of the substrate supporting features, the seasoning layer comprising a silicon nitride.
本公开一般关于用于半导体处理的基板支撑件。在一个实施例中,提供了基板支撑件。基板支撑件包括:主体,包含基板夹持表面;电极,设置在主体内;多个基板支撑特征,形成在基板夹持表面上,其中基板支撑特征的数量从基板夹持表面的中心到基板夹持表面的边缘径向增加;以及调节层,形成在多个基板支撑特征上,调节层包含氮化硅。 |
---|---|
AbstractList | The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate support includes a body comprising a substrate chucking surface, an electrode disposed within the body, a plurality of substrate supporting features formed on the substrate chucking surface, wherein the number of substrate supporting features increases radially from a center of the substrate chucking surface to an edge of the substrate chucking surface, and a seasoning layer formed on the plurality of the substrate supporting features, the seasoning layer comprising a silicon nitride.
本公开一般关于用于半导体处理的基板支撑件。在一个实施例中,提供了基板支撑件。基板支撑件包括:主体,包含基板夹持表面;电极,设置在主体内;多个基板支撑特征,形成在基板夹持表面上,其中基板支撑特征的数量从基板夹持表面的中心到基板夹持表面的边缘径向增加;以及调节层,形成在多个基板支撑特征上,调节层包含氮化硅。 |
Author | BALASUBRAMANIAN GANESH KHAJA ABDUL AZIZ RATHI SUDHA S HU LIANGFA |
Author_xml | – fullname: KHAJA ABDUL AZIZ – fullname: BALASUBRAMANIAN GANESH – fullname: HU LIANGFA – fullname: RATHI SUDHA S |
BookMark | eNrjYmDJy89L5WTw9XUN8fB3CVbwd1Pw9fTz9PWM8vRzVwh3dHMNUnBydPYO9nRxVXBx9HV0d1Xw9FMIdvX1dPb3cwl1DvEPgioLCPJ3dg0OBurjYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GhkaGZmYmluaOxsSoAQAGIC_y |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
DocumentTitleAlternate | 半导体晶片处理中最小化晶片背侧损伤的方法 |
ExternalDocumentID | CN112166497A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_CN112166497A3 |
IEDL.DBID | EVB |
IngestDate | Fri Aug 16 05:49:32 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | Chinese English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_CN112166497A3 |
Notes | Application Number: CN201980035398 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210101&DB=EPODOC&CC=CN&NR=112166497A |
ParticipantIDs | epo_espacenet_CN112166497A |
PublicationCentury | 2000 |
PublicationDate | 20210101 |
PublicationDateYYYYMMDD | 2021-01-01 |
PublicationDate_xml | – month: 01 year: 2021 text: 20210101 day: 01 |
PublicationDecade | 2020 |
PublicationYear | 2021 |
RelatedCompanies | APPLIED MATERIALS, INC |
RelatedCompanies_xml | – name: APPLIED MATERIALS, INC |
Score | 3.4341154 |
Snippet | The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | METHODS OF MINIMIZING WAFER BACKSIDE DAMAGE IN SEMICONDUCTOR WAFER PROCESSING |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210101&DB=EPODOC&locale=&CC=CN&NR=112166497A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR1NS8Mw9DGnqDedis4PIkhvxZXWtD0U2ZJ2q9J0dJ0OL2NpO9TDNlxF8Nf7WjvnRcklJOGRPHjfHwG4opakdCq1IjRoqgYaBKpMbUPVqKUl6cTSzKzs9ilob2jcjW5GNXhd1cKUfUI_yuaISFEJ0nte8uvF2onFy9zK5bV8waX5rRc7XKmsY7RfcCi847j9kIdMYcxhQhGRg2qFRqlhm-0N2EQ12izSv9yHTlGVsvgtUrw92OojtFm-D7XP5wbssNXPaw3YDqqAN04r2lseQBC4cS_kAxJ6JPAFMp0nX3TJY9tzI9Jps_uBz13CkYl2XeILMigwHAo-ZHEYVcf6UcgK_im6h3DpuTHrqXiv8Q8Sxkysn6AfQX02n2XHQFoJ2gNTTTOlTo3U1i1Ln7bSRGZFRDOz5Qk0_4bT_G_zFHYLhH67G86gnr-9Z-cogHN5UWLuC0XzglQ |
link.rule.ids | 230,309,783,888,25578,76884 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT4MwFH-Z0zhvOjU6v2piuBFHwAIHYrYWBm6UhTFdvBALLOphWxzGxL_egsx50fTStM1L-0veV1_fK8AVNjjGU64UoUFd1oRDIPPU1GQFG0qSPhmKnpXVPhl2x9rd5GZSg9dVLkxZJ_SjLI4oOCoR_J6X8nqxvsSi5dvK5TV_EUPzWyeyqFR5x8J_EU2iXcseBjQgEiEWYRILLWFWKBhrpt7ZgE1hYhtFnX37vltkpSx-qxRnF7aGgtos34Pa53MTGmT181oTtv0q4C26Fe8t98H37cgN6AgFDvI9JoTOo8d66KHj2CHqdkh_5FEbUSFEezbyGBoVCAeMjkkUhNWyYRiQQn6y3gFcOnZEXFnsK_4BISZsfQT1EOqz-Sw7AtROhD8wVRSdq1hLTdUw1Gk7TXhWRDQzkx9D6286rf8mL6DhRv4gHnisfwI7BbjfVw-nUM_f3rMzoYxzfl6i-AWLW4VE |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=METHODS+OF+MINIMIZING+WAFER+BACKSIDE+DAMAGE+IN+SEMICONDUCTOR+WAFER+PROCESSING&rft.inventor=KHAJA+ABDUL+AZIZ&rft.inventor=BALASUBRAMANIAN+GANESH&rft.inventor=HU+LIANGFA&rft.inventor=RATHI+SUDHA+S&rft.date=2021-01-01&rft.externalDBID=A&rft.externalDocID=CN112166497A |