Adaptive charge pump phase-locked loop for high-speed interface circuit
The invention relates to a self-adaptive charge pump phase-locked loop for a high-speed interface circuit. The phase-locked loop comprises a phase-locked loop circuit and an auxiliary circuit, and theauxiliary circuit comprises an input clock buffer B101, a clock counter B102, a voltage detection mo...
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Main Authors | , , , , , , , , , , , |
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Format | Patent |
Language | Chinese English |
Published |
14.04.2020
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Subjects | |
Online Access | Get full text |
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Summary: | The invention relates to a self-adaptive charge pump phase-locked loop for a high-speed interface circuit. The phase-locked loop comprises a phase-locked loop circuit and an auxiliary circuit, and theauxiliary circuit comprises an input clock buffer B101, a clock counter B102, a voltage detection module B106, a low dropout regulator B107, a bias circuit B108, an AND gate G111 and a switch. According to the invention, the stability of the phase-locked loop circuit is improved by using an adaptive circuit structure, and the noise of a clock signal output by the phase-locked loop circuit is reduced; and a voltage detection module is introduced to monitor the control voltage of a voltage-controlled oscillator in real time; if the voltage-controlled oscillator works at an over-high or over-lowfrequency, the phase-locked loop stops working, the voltage-controlled oscillator is reset at a proper working point, and then the phase-locked loop is restarted, so that the phase-locked loop is prevented from being locked a |
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Bibliography: | Application Number: CN201911109126 |