SEMICONDUCTOR DEVICE STRUCTURE

• Main Authors: CHEN SHENGIEH, LIU MING CHYI, LIU SHIHANG
• Format: Patent
• Language: Chinese; English
• Published: 05.03.2019
• Subjects: ELECTRICITY

An integrated circuit for a flash memory device with enlarged spacing between select and memory gate structures is provided. The enlarged spacing is obtained by forming corner recesses at the select gate structure so that a top surface with a reduced dimension of the select gate structure is obtained. In one example, a semiconductor substrate having memory cell devices formed thereon, the memory cell devices includes a semiconductor substrate having memory cell devices formed thereon, the memory cell devices includes a plurality of select gate structures and a plurality of memory gate structures formed adjacent to the plurality of select gate structures, wherein at least one of the plurality of select gate structures have a corner recess formed below a top surface of the at least one of the plurality of select gate structures. 提供种集成电路以用于闪存装置，其于选择栅极结构与存储栅极结构之间具有扩大空间。在选择栅极结构形成角落凹陷可得到扩大空间，并缩小选择栅极结构的上表面尺寸。在例中，半导体基板具有存储器装置形成其上，且存储器装置包含的半导体基板具有存储器装置形成其上。存储器装置包含多个选择栅极结构，以及与选择栅极结构相邻的多个存储栅极结构，其中至少选择栅极结构具有凹陷角落形成于至少选择栅极