FPGA implementation method for Cholesky decomposition of positive definite matrix

• Main Authors: LUO YUANYONG, LI WEI, LI LI, SUN HUAQING, PAN HONGBING, HE SHUZHUAN
• Format: Patent
• Language: Chinese; English
• Published: 02.11.2018
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The present invention discloses an FPGA implementation method for Cholesky decomposition of a positive definite matrix. The method is mainly provided with: a top layer control module, for communication and control between modules; a data preprocessing module, for decomposing a positive definite matrix into two matrices for calculation operations in a matrix calculation module; and the matrix calculation module, for calculating two matrices obtained by the data preprocessing module to obtain a final Cholesky decomposition calculation result. Beneficial effects of the method disclosed by the present invention are that: by using the traditional hardware to directly implement Cholesky decomposition of the positive definite matrix, the algorithm is complex, the occupied area is large, and the resource consumption is more, and by using the rotation characteristic of the CORDIC algorithm to implement the Cholesky decomposition of the positive definite matrix, the implementation is simple, only the bit operation is n