Method and system for automatic generation of module-level simulation and code configuration of programmable logic circuit

• Main Authors: YANG HAIGANG, ZHAO HE, HUANG ZHIHONG, DI XINKAI, YIN TAO, TU KAIHUI, XU YU, MAO NING, WEI XING
• Format: Patent
• Language: Chinese; English
• Published: 10.04.2018
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a method for automatic generation of module-level simulation and code configuration of a programmable logic circuit. The method comprises the following steps: analyzing a bottom-layer circuit structure of FPGA, respectively creating configuration addressing models of a bottom...