Field programmable gate array (FPGA) based high-speed analog-digital converter (ADC) synchronous acquisition system

The invention relates to a field programmable gate array (FPGA) based high-speed analog-digital converter (ADC) synchronous acquisition system, comprising an FPGA based signal processing platform and a high-speed ADC synchronous acquisition daughter board. A clock signal for ADC acquisition, a contr...

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Bibliographic Details
Main Author QIN YANZHAO
Format Patent
LanguageEnglish
Published 14.10.2015
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Summary:The invention relates to a field programmable gate array (FPGA) based high-speed analog-digital converter (ADC) synchronous acquisition system, comprising an FPGA based signal processing platform and a high-speed ADC synchronous acquisition daughter board. A clock signal for ADC acquisition, a control signal and date collected by the ADC on the high-speed ADC synchronous acquisition daughter board are transmitted to the FPGA based signal processing platform, and the FPGA based signal processing platform performs subsequent signal processing; the high-speed ADC synchronous acquisition daughter board comprises an ultralow jitter synchronous clock generation circuit, a power supply module, and a plurality of high-speed ADC acquisition circuits; and the front end of each high-speed ADC acquisition circuit is connected with a broadband signal conditioning circuit. Synchronous sampling is performed on the ADC between different channels through a multichannel ADC synchronization technology; the ultralow jitter synchronous clock generation circuit generates multichannel low jitter clocks meeting high-speed ADC signal to noise ratio and synchronism requirements; due to adoption of the two-stage alternating current coupling broadband signal conditioning circuit, the high-speed ADC acquisition circuit can collect middle frequency signals with input frequency between 10kHz and 700MHz; and the power supply module adopts a low noise power supply design.
Bibliography:Application Number: CN20151263659