High-speed low-power-consumption multi-threshold-value synchronous set-reset D-type trigger

• Main Authors: HU FENGLIN, LIU YAO, LIANG BIN, CHI YAQING, LI ZHENTAO, LIU BIWEI, LIU PENGXIA, HAN LONG, GUO YANG, LIU XIANGYUAN, HU CHUNMEI, CHEN JIANJUN, WU HUCHENG
• Format: Patent
• Language: English
• Published: 20.05.2015
• Subjects: BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; PULSE TECHNIQUE

A high-speed low-power-consumption multi-threshold-value synchronous set-reset D-type trigger comprises a low-power-consumption control circuit which receives a low-power-consumption control input signal (slp), performs buffer treatment to the low-power-consumption control input signal (slp) and then outputs signals, respectively; a setting control circuit which receives a synchronous setting input signal (set), performs buffer treatment on the synchronous setting input signal (set) and then output signals (s and ns), respectively; a main latch which receives a data signal (d), a normal-phase clock input signal (clk), a reverse clock input signal (nclk), a synchronous resetting input signal (r) and signals (sleep, n-sleep, s and ns), and then performs latch treatment on the data signal (d) and output signal (qt); a slave latch for receiving signal (qt), the normal-phase clock input signal (clk) and the reverse clock input signal (nclk); the slave latch performs latch treatment on the signal (qt) and then outputs a first output signal (q) and a second output signal (nq), respectively. The high-speed low-power-consumption multi-threshold-value synchronous set-reset D-type trigger has the advantages of simple structure, improved transmission efficiency, reduced static drain current, reduced power consumption and the like.