Flash Memory Programming And Verification With Reduced Leakage Current

A flash memory system configured in accordance with an example embodiment of the invention employs a virtual ground array architecture. During programming operations, target memory cells are biased with a positive source bias voltage to reduce or eliminate leakage current that might otherwise conduc...

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Bibliographic Details
Main Authors ED RUNNION, MARK RANDOLPH, MELIK MARTIROSIAN ASHOT, MENG DIN
Format Patent
LanguageChinese
English
Published 06.08.2014
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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