Hardware design structure of overtime timer in communication protocol processor

• Main Authors: YU DUNSHAN, JIN JIE, WANG YANGYUAN, CUI XIAOXIN
• Format: Patent
• Language: Chinese; English
• Published: 22.02.2012
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a hardware design structure of an overtime timer in a communication protocol processor, and relates to the technical field of protocol processor design. The hardware design structure mainly aims to solve the problems that the performance of the protocol processor is influenced due to the not-high precision and low working speed of the overtime timer in the conventional communication protocol processor. The hardware design structure of the invention comprises a control logic module, a timer module, a multi-path selector, a comparator module, or a logic module, an overtime table module and a filter. In the hardware design structure, software is replaced by a hardware structure to perform the searching, deleting and inserting operation of overtime table items, so thatthe performance of the overtime timer is greatly improved; and at the same time, the precision of the hardware timer is not limited by the highest frequency of an embedded processor by setting the timers with different precis