Selective spacer formation on transistors of different classes on the same device

• Main Authors: BOHR MARK, JAN CHIA-HONG, CURELLO GUISEPPE, POST IAN R
• Format: Patent
• Language: Chinese; English
• Published: 04.07.2012
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of selectively forming a spacer on a first class of transistors and devices formed by such methods. The method can include depositing a conformal first deposition layer on a substrate with different classes of transistors situated thereon, depositing a blocking layer to at least one class of transistors, dry etching the first deposition layer, removing the blocking layer, depositing a conformal second deposition layer on the substrate, dry etching the second deposition layer and wet etching the remaining first deposition layer. Devices may include transistors of a first class with larger spacers compared to spacers of transistors of a second class.