Loop-back testing method and apparatus for ic

The present invention discloses testing system and method for integrated circuits, which can greatly reduce circuits cost of testing system and providing more efficient testing mode. The test system includes: a first IC, for modulating a first signal to generate a first modulated signal and transmit...

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Bibliographic Details
Main Authors YEH CHUN-WEN, HSIEH CHIH-YUAN
Format Patent
LanguageChinese
English
Published 22.08.2012
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:The present invention discloses testing system and method for integrated circuits, which can greatly reduce circuits cost of testing system and providing more efficient testing mode. The test system includes: a first IC, for modulating a first signal to generate a first modulated signal and transmitting the first modulated signal, and for receiving a second modulated signal and demodulating the second modulated signal to generate a second signal; a first loop antenna, coupled to the first IC, for receiving the first modulated signal and sending the first modulated signal back to the first IC as the second modulated signal; and a tester circuit coupled to the first IC, for generating the first signal to the first IC, receiving the second signal from the first IC, and comparing the first signal and the second signal to determine the operability of the first IC.
Bibliography:Application Number: CN200810177359