Integrated circuit self-test architecture
An integrated circuit (1) comprises a monitor (Ml, M3, M3) operable to produce monitor data in dependence upon a measured parameter of the integrated circuit (1); and a self test controller (28) connected to receive monitor data from the monitor (Ml, M2, M3). The self-test controller is also operabl...
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Main Author | |
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Format | Patent |
Language | English |
Published |
31.10.2007
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Subjects | |
Online Access | Get full text |
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