Techniques for providing flexible on-chip termination control on integrated circuits

On-chip termination (OCT)calibration techniques are provided that support input/output (IO) banks on an integrated circuit (IC) using OCT controllers. The OCT controllers calibrate the on-chip termination impedance in the IO banks using a shared parallel bus or separate parallel buses. Multiplexers...

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Bibliographic Details
Main Authors NGUYEN KHAI Q, WANG XIAOBAO, SUNG CHIAKANG
Format Patent
LanguageChinese
English
Published 19.09.2012
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
INFORMATION STORAGE
PHYSICS
RESONATORS
STATIC STORES
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:On-chip termination (OCT)calibration techniques are provided that support input/output (IO) banks on an integrated circuit (IC) using OCT controllers. The OCT controllers calibrate the on-chip termination impedance in the IO banks using a shared parallel bus or separate parallel buses. Multiplexers or select logic in each IO bank select control signals from the OCT controllers in response to select signals. According to some embodiments, each of the IO banks on an IC can receive OCT control signals from any of the OCT controllers on the IC.
Bibliography:Application Number: CN2007195834