Transistor having low capacitance field plate structure
A Field Effect Transistor (FET) having a source, drain, and gate disposed laterally along a surface of a semiconductor and a field plate structure: having one end connected to the source; and having a second end disposed between the gate and the drain and separated from the drain by a gap (37). A di...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
12.12.2019
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Subjects | |
Online Access | Get full text |
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Summary: | A Field Effect Transistor (FET) having a source, drain, and gate disposed laterally along a surface of a semiconductor and a field plate structure: having one end connected to the source; and having a second end disposed between the gate and the drain and separated from the drain by a gap (37). A dielectric structure (30) is disposed over the semiconductor, having: a first portion disposed under the second end of the field plate structure; and, a second, thinner portion under the gap. |
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Bibliography: | Application Number: AU20180354011 |