Method and system for diagnosing a fault or open circuit in a network
A fault injection circuit (34) injects a test signal into a data bus (17) with a normal high logic level and a normal low logic level. The test signal has a greater logic level greater than the normal high logic level of the data bus (17) or a lower logic level lower than the normal low logic level...
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Format | Patent |
Language | English |
Published |
24.12.2015
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Abstract | A fault injection circuit (34) injects a test signal into a data bus (17) with a normal high logic level and a normal low logic level. The test signal has a greater logic level greater than the normal high logic level of the data bus (17) or a lower logic level lower than the normal low logic level of the data bus (17). An analog-to- digital converter (36) is coupled to a voltage level detector (35) for sensing an aggregate level of an aggregate signal on the data bus (17). The aggregate signal is composed of the termination circuit signal and the test signal. A diagnostic tool (10) determines whether a faulty connection between the data bus (17) and a network device (44, 144, 244) exists, where the sensed aggregate level exceeds at least one of the normal high logic level and the normal low logic level. |
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AbstractList | A fault injection circuit (34) injects a test signal into a data bus (17) with a normal high logic level and a normal low logic level. The test signal has a greater logic level greater than the normal high logic level of the data bus (17) or a lower logic level lower than the normal low logic level of the data bus (17). An analog-to- digital converter (36) is coupled to a voltage level detector (35) for sensing an aggregate level of an aggregate signal on the data bus (17). The aggregate signal is composed of the termination circuit signal and the test signal. A diagnostic tool (10) determines whether a faulty connection between the data bus (17) and a network device (44, 144, 244) exists, where the sensed aggregate level exceeds at least one of the normal high logic level and the normal low logic level. |
Author | SCHLICHTMANN, MICHAEL R SMART, DAVID C LANDMAN, RONALD G |
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Snippet | A fault injection circuit (34) injects a test signal into a data bus (17) with a normal high logic level and a normal low logic level. The test signal has a... |
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SubjectTerms | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
Title | Method and system for diagnosing a fault or open circuit in a network |
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