重离子辐照引发的25 nm NAND Flash存储器数据位翻转
TL72; 为研究不同注量下浮栅存储单元位翻转特点及其翻转截面变化,以及重离子入射导致的多单元翻转,以两款25 nm NAND Flash存储器为载体开展了重离子实验研究.实验结果表明,单个重离子在击中存储单元灵敏体积的情况下足以引起位翻转,位翻转比率随着注量累积基本呈线性变化.由于处于编程状态阈值电压分布低压区的存储单元倾向于在相邻或靠近的地址上集中分布,随着注量累积,这类存储单元数量迅速减少,而其他大量存储单元的翻转数增长率变化不明显,因此位翻转截面随注量累积呈下降趋势.重离子导致两款器件出现多单元翻转,多单元翻转呈现单列、双列以及列间隔等结构.利用离子电离径迹模型估算得到离子电离有效径迹...
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| Published in | 原子能科学技术 Vol. 57; no. 12; pp. 2264 - 2273 |
|---|---|
| Main Authors | , , , , , , , , |
| Format | Journal Article |
| Language | Chinese |
| Published |
强辐射脉冲环境模拟与效应全国重点实验室西北核技术研究所,陕西西安 710024%西安高技术研究所,陕西西安 710025%强辐射脉冲环境模拟与效应全国重点实验室西北核技术研究所,陕西西安 710024
01.12.2023
西安高技术研究所,陕西西安 710025 |
| Subjects | |
| Online Access | Get full text |
| ISSN | 1000-6931 |
| DOI | 10.7538/yzk.2023.youxian.0688 |
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| Abstract | TL72; 为研究不同注量下浮栅存储单元位翻转特点及其翻转截面变化,以及重离子入射导致的多单元翻转,以两款25 nm NAND Flash存储器为载体开展了重离子实验研究.实验结果表明,单个重离子在击中存储单元灵敏体积的情况下足以引起位翻转,位翻转比率随着注量累积基本呈线性变化.由于处于编程状态阈值电压分布低压区的存储单元倾向于在相邻或靠近的地址上集中分布,随着注量累积,这类存储单元数量迅速减少,而其他大量存储单元的翻转数增长率变化不明显,因此位翻转截面随注量累积呈下降趋势.重离子导致两款器件出现多单元翻转,多单元翻转呈现单列、双列以及列间隔等结构.利用离子电离径迹模型估算得到离子电离有效径迹半径,可以判定多单元翻转是由于一个离子的电离有效径迹覆盖了多个存储单元. |
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| AbstractList | TL72; 为研究不同注量下浮栅存储单元位翻转特点及其翻转截面变化,以及重离子入射导致的多单元翻转,以两款25 nm NAND Flash存储器为载体开展了重离子实验研究.实验结果表明,单个重离子在击中存储单元灵敏体积的情况下足以引起位翻转,位翻转比率随着注量累积基本呈线性变化.由于处于编程状态阈值电压分布低压区的存储单元倾向于在相邻或靠近的地址上集中分布,随着注量累积,这类存储单元数量迅速减少,而其他大量存储单元的翻转数增长率变化不明显,因此位翻转截面随注量累积呈下降趋势.重离子导致两款器件出现多单元翻转,多单元翻转呈现单列、双列以及列间隔等结构.利用离子电离径迹模型估算得到离子电离有效径迹半径,可以判定多单元翻转是由于一个离子的电离有效径迹覆盖了多个存储单元. |
| Abstract_FL | In order to investigate the influence of heavy ion fluence on single event upsets(SEU)and the SEU cross-section in NAND Flash memory,as well as the multi-ple-cell upsets(MCU)due to heavy ion irradiation,experimental studies were per-formed on two types of 25 nm NAND Flash memory devices.These experiments were conducted at the HI-13 Tandem Accelerator at the China Institute of Atomic Energy and the Heavy Ion Research Facility in Lanzhou(HIRFL).The experiment results revealed that bit upsets were randomly distributed across addresses,hereditary in two tests,reduced insignificantly after short-term annealing and reprogrammable,suggesting that the primary cause of bit upsets is charge loss of the floating gate in the memory cells.The memory cells with 25 nm feature size demonstrated a pronounced sensitivity to heavy ion irradiation,with a single ion strike on the sensitive volume capable of inducing a bit upset.Consequently,when the cumulative fluence remains significantly below the memory array's density,the bit upset ratio exhibits a nearly linear correlation with the accumulation of heavy ion fluence.The study also identified that the severity of MCU events was proportional to the linear energy transfer(LET)of the incident ion,which led to a non-saturation effect in the SEU cross-section of NAND Flash memory,indica-ting that the Weibull fitting-based SEU cross-section evaluation method may not be appropriate for NAND Flash memory,or introduce significant errors.When program-ming the memory array to 55 h,the MCU topological patterns manifested as single vertical columns,double vertical columns,interval vertical columns,and so on,attrib-utable to the interleaved bit line architecture of the memory array.Utilizing the ion track model,the effective radii of ion tracks for Ta,Ti,Al,and F were qualitatively estimated using experimental data from Ta.These estimated values align with the experimental observations of SEU cross-section and MCU statistics.It is postulated that in space applications,when the LET of the incident ion is sufficiently high or when adjacent bits within a byte are in a programming state,heavy ion incidence may induce multiple-bit upsets(MBU)within a single byte,posing additional challenges for error correction.The research further observed a decrease in the SEU cross-section with increasing fluence,particularly with Ti ions.This trend is attributed to the rapid decrease in the number of memory cells within the low voltage region of the programmed state threshold voltage distribution,which are centrally located on adjacent or nearby addresses,and the relatively unchanged growth rate of bit upsets in the remaining majority of memory cells.The relationship between SEU cross-section and heavy ion fluence suggests that irradiation at higher fluence may lead to an underestimation of the on-orbit bit upset rate for NAND Flash memory.Conversely,testing at lower fluence may yield a more conservative or accurate prediction of the on-orbit bit upset rate. |
| Author | 王祖军 姚志斌 张凤祁 许鹏 邱孟通 盛江坤 缑石龙 丁李利 罗尹虹 |
| AuthorAffiliation | 西安高技术研究所,陕西西安 710025;强辐射脉冲环境模拟与效应全国重点实验室西北核技术研究所,陕西西安 710024%西安高技术研究所,陕西西安 710025%强辐射脉冲环境模拟与效应全国重点实验室西北核技术研究所,陕西西安 710024 |
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| Author_FL | GOU Shilong ZHANG Fengqi DING Lili LUO Yinhong SHENG Jiangkun XU Peng WANG Zujun QIU Mengtong YAO Zhibin |
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| DOI | 10.7538/yzk.2023.youxian.0688 |
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| DocumentTitle_FL | Bit Upset of 25 nm NAND Flash Memory Induced by Heavy Ion Irradiation |
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| Keywords | floating gate NAND Flash 注量相关性 多单元翻转 fluence dependence heavy ion irradiation 浮栅 multiple-cell upsets 重离子辐照 |
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| Title | 重离子辐照引发的25 nm NAND Flash存储器数据位翻转 |
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