An enhanced fully scaled 1.2-μm CMOS process for analog applications
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Published in | IEEE journal of solid-state circuits Vol. 21; no. 2; pp. 293 - 296 |
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Main Authors | , , , , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
Institute of Electrical and Electronics Engineers
01.04.1986
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Subjects | |
Online Access | Get full text |
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