ParRP: Enabling Space Isolation in Caches with Shared Data
This work presents an approach to isolate cache space while supporting shared data. Enabling shared data caching is challenging because it causes interference making it unsuitable for real-time multicores. Unlike prior works, we aim to introduce isolation, but our approach enables caching of shared...
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Published in | Proceedings / IEEE Real-Time and Embedded Technology and Applications Symposium pp. 82 - 94 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
06.05.2025
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Subjects | |
Online Access | Get full text |
ISSN | 2642-7346 |
DOI | 10.1109/RTAS65571.2025.00020 |
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Abstract | This work presents an approach to isolate cache space while supporting shared data. Enabling shared data caching is challenging because it causes interference making it unsuitable for real-time multicores. Unlike prior works, we aim to introduce isolation, but our approach enables caching of shared data, and promotes isolated cache analysis for individual cores. The crux behind our approach is that shared data isolation can be achieved by partitioning the replacement information instead of the cache's data storage. Consequently, this work introduces ParRP, a novel hardware cache partitioning scheme for realtime cache-coherent multicores. Our evaluation using the gem5 simulator shows that, by providing isolation for shared data, the worst-case execution time of multi-threaded tasks can be lower by 2.4× at the cost of a 16.5% decrease in average-case performance. |
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AbstractList | This work presents an approach to isolate cache space while supporting shared data. Enabling shared data caching is challenging because it causes interference making it unsuitable for real-time multicores. Unlike prior works, we aim to introduce isolation, but our approach enables caching of shared data, and promotes isolated cache analysis for individual cores. The crux behind our approach is that shared data isolation can be achieved by partitioning the replacement information instead of the cache's data storage. Consequently, this work introduces ParRP, a novel hardware cache partitioning scheme for realtime cache-coherent multicores. Our evaluation using the gem5 simulator shows that, by providing isolation for shared data, the worst-case execution time of multi-threaded tasks can be lower by 2.4× at the cost of a 16.5% decrease in average-case performance. |
Author | Pellizzoni, Rodolfo Patel, Hiren Wang, Xinzhe |
Author_xml | – sequence: 1 givenname: Xinzhe surname: Wang fullname: Wang, Xinzhe email: xinzhe.wang@uwaterloo.ca organization: University of Waterloo,Waterloo,Ontario,Canada – sequence: 2 givenname: Rodolfo surname: Pellizzoni fullname: Pellizzoni, Rodolfo email: rpellizz@uwaterloo.ca organization: University of Waterloo,Waterloo,Ontario,Canada – sequence: 3 givenname: Hiren surname: Patel fullname: Patel, Hiren email: hiren.patel@uwaterloo.ca organization: University of Waterloo,Waterloo,Ontario,Canada |
BookMark | eNotj9FKwzAUQKMouM39wR7yA625uUnT7G3UqYOBY937uE1TG6npaAvi3zvQp8N5OXDm7C720TO2ApECCPt0PG3KTGsDqRRSp0IIKW7Y0hqbI4JWqIS8ZTOZKZkYVNkDm4_jpxCYSYsztj7QcDys-TZS1YX4wcsLOc93Y9_RFPrIQ-QFudaP_DtMLS9bGnzNn2miR3bfUDf65T8XrHzZnoq3ZP_-uis2-yRYnBJDEixZn9vG1QYIEGo0OkcFiixkVyOhnLWWnG7ANeCrStUSHRgHDS7Y6q8avPfnyxC-aPg5X9chNybHXyB5R_U |
CODEN | IEEPAD |
ContentType | Conference Proceeding |
DBID | 6IE 6IL CBEJK RIE RIL |
DOI | 10.1109/RTAS65571.2025.00020 |
DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Xplore POP ALL IEEE Xplore All Conference Proceedings IEEE Electronic Library (IEL) IEEE Proceedings Order Plans (POP All) 1998-Present |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/ sourceTypes: Publisher |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Computer Science |
EISBN | 9798331543402 |
EISSN | 2642-7346 |
EndPage | 94 |
ExternalDocumentID | 11018778 |
Genre | orig-research |
GrantInformation_xml | – fundername: NSERC funderid: 10.13039/501100000038 |
GroupedDBID | 6IE 6IK 6IL 6IN AAWTH ABLEC ACGFS ADZIZ ALMA_UNASSIGNED_HOLDINGS BEFXN BFFAM BGNUA BKEBE BPEOZ CBEJK CHZPO IEGSK IPLJI M43 OCL RIE RIL |
ID | FETCH-LOGICAL-i93t-7a219a9e89fcd71a131d37583414a9161d3a04c999ac5f1cf1ebb4d23c17c1f3 |
IEDL.DBID | RIE |
IngestDate | Wed Aug 27 01:48:56 EDT 2025 |
IsPeerReviewed | false |
IsScholarly | true |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-LOGICAL-i93t-7a219a9e89fcd71a131d37583414a9161d3a04c999ac5f1cf1ebb4d23c17c1f3 |
PageCount | 13 |
ParticipantIDs | ieee_primary_11018778 |
PublicationCentury | 2000 |
PublicationDate | 2025-May-6 |
PublicationDateYYYYMMDD | 2025-05-06 |
PublicationDate_xml | – month: 05 year: 2025 text: 2025-May-6 day: 06 |
PublicationDecade | 2020 |
PublicationTitle | Proceedings / IEEE Real-Time and Embedded Technology and Applications Symposium |
PublicationTitleAbbrev | RTAS |
PublicationYear | 2025 |
Publisher | IEEE |
Publisher_xml | – name: IEEE |
SSID | ssj0036293 |
Score | 2.290853 |
Snippet | This work presents an approach to isolate cache space while supporting shared data. Enabling shared data caching is challenging because it causes interference... |
SourceID | ieee |
SourceType | Publisher |
StartPage | 82 |
SubjectTerms | cache partitioning Costs Full stack Hardware Interference Memory Multicore processing predictable architecture Real-time systems resource isolation shared last-level cache |
Title | ParRP: Enabling Space Isolation in Caches with Shared Data |
URI | https://ieeexplore.ieee.org/document/11018778 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1La8JAEF6qp57sw9I3e-g1mjWPTbwVq9hCRdSCN5nszoIUYrHx0l_fmZi0pVDoLRsCCTuZxzc7840Qd-gISMcQeswm7oXakM4haI9CcwTng1OWUwPPk3j8Ej4to2XVrF72wiBiWXyGHb4sz_Ltxuw4VdZVTC-lddIQDUJu-2at2uySIU6DqjdO-Wl3trifx1GkGQP2OG_i80jvHxNUSgcyaolJ_ep93chrZ1dkHfPxi5Xx3992JNrfvXpy-uWFjsUB5ieiVQ9rkJXunor-FLazaV8OuVmKnpRzQssoH-nfK4Uj17kcMLvzu-TcrGQmZ7TyAQpoi_louBiMvWpwgrdOg8LTQGYIUkxSZ6xWoALacMIF5LBCoHCQVuCHhkJDMJFTxinMstD2AqO0US44E818k-O5kARGMoAgJhSSkRwtKXuEmmRoo4QW9kK0eSdWb3tmjFW9CZd_3L8ShyyNsmAwvhbNYrvDG3LqRXZbCvMTK5-gBw |
linkProvider | IEEE |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1LT8JAEJ4oHvSED4xv9-C10LWPpdwMQkCBEMCEG5nuThNiUgyWi7_e2dKqMTHx1m2atNnpPHe-bwDuKOFEOkTfsWzijq806xyhcjg0J0xcTKSxpYHhKOy9-E_zYF6A1XMsDBHlzWdUt5f5Wb5Z6Y0tlTWkpZdSqrkLe-z4A7mFa5WGl01x5BXoOOlGjcnsYRoGgbJZ4L2tnLh2qPePGSq5C-lWYVS-fNs58lrfZHFdf_ziZfz31x1C7RutJ8ZffugIdig9hmo5rkEU2nsCrTGuJ-OW6Fi4FD8pppwvk-jz35eLRyxT0bb8zu_CVmeF5XImIx4xwxpMu51Zu-cUoxOcZeRljkI2RBhRM0q0URKlx1vOmQG7LB85IOQVur7m4BB1kEidSIpj39x7WiotE-8UKukqpTMQnI7EiF7IeUjMkjSs7gEplqIJmrww51CzO7F423JjLMpNuPjj_i3s92bDwWLQHz1fwoGVTN4-GF5BJVtv6JpdfBbf5IL9BLjqo1A |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Proceedings+%2F+IEEE+Real-Time+and+Embedded+Technology+and+Applications+Symposium&rft.atitle=ParRP%3A+Enabling+Space+Isolation+in+Caches+with+Shared+Data&rft.au=Wang%2C+Xinzhe&rft.au=Pellizzoni%2C+Rodolfo&rft.au=Patel%2C+Hiren&rft.date=2025-05-06&rft.pub=IEEE&rft.eissn=2642-7346&rft.spage=82&rft.epage=94&rft_id=info:doi/10.1109%2FRTAS65571.2025.00020&rft.externalDocID=11018778 |