Gm enhancement for bulk-driven sub-threshold differential pair in nanometer CMOS process
In this paper a simple and efficient way to enhance the transconductance G m for bulk-driven sub-threshold differential pair in nanometer CMOS process is presented. This approach is based on a type of positive feedback source degeneration, which does not depend on geometry parameters or biasing volt...
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Published in | 2012 IEEE Subthreshold Microelectronics Conference pp. 1 - 3 |
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Main Authors | , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.10.2012
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Subjects | |
Online Access | Get full text |
ISBN | 1467315869 9781467315869 |
DOI | 10.1109/SubVT.2012.6404320 |
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Abstract | In this paper a simple and efficient way to enhance the transconductance G m for bulk-driven sub-threshold differential pair in nanometer CMOS process is presented. This approach is based on a type of positive feedback source degeneration, which does not depend on geometry parameters or biasing voltages, and leads to improved values for the DC gain and the unity gain frequency, without increasing power consumption or changing other features. Despite of possible differential pair output resistance variation, the DC gain and the unity gain frequency of weak inversion differential pair can be increased by (n + 1)/(n - 1) times (e.g., 13.72 times in an 130-nm IBM CMOS process), a factor that improves with scaling while many other device characteristics degrade. |
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AbstractList | In this paper a simple and efficient way to enhance the transconductance G m for bulk-driven sub-threshold differential pair in nanometer CMOS process is presented. This approach is based on a type of positive feedback source degeneration, which does not depend on geometry parameters or biasing voltages, and leads to improved values for the DC gain and the unity gain frequency, without increasing power consumption or changing other features. Despite of possible differential pair output resistance variation, the DC gain and the unity gain frequency of weak inversion differential pair can be increased by (n + 1)/(n - 1) times (e.g., 13.72 times in an 130-nm IBM CMOS process), a factor that improves with scaling while many other device characteristics degrade. |
Author | Ferreira, L. H. C. Sonkusale, S. R. |
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Snippet | In this paper a simple and efficient way to enhance the transconductance G m for bulk-driven sub-threshold differential pair in nanometer CMOS process is... |
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SubjectTerms | bulk-driven differential pair CMOS process G m enhancement Gain low-power applications low-voltage nanometer CMOS process Power demand Threshold voltage Transconductance Transistors |
Title | Gm enhancement for bulk-driven sub-threshold differential pair in nanometer CMOS process |
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