Electromagnetic Immunity Test of Analog-to-Digital Interfaces of a Mixed-Signal Programmable SoC

• Published in: 2019 IEEE Latin American Test Symposium (LATS) pp. 1 - 5
• Main Authors: Dias, Luiz G. S., Gonzalez, Carlos J., Boeira, Fernando J., Balen, Tiago R.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.03.2019
• Subjects: Analog-to-Digital Converters; Computer architecture; Data acquisition; Design Diversity; Electromagnetic interference; Electromagnetics; Mixed-Signal; Performance evaluation; Programmable System-on-Chip (PSoC); Registers; System-on-chip
• DOI: 10.1109/LATW.2019.8704571

In this work, a radiated electromagnetic immunity test is performed upon a commercial programmable System-on-Chip (PSoC 5, from Cypress Semiconductor). The focus of the test is the Analog-to-Digital interface blocks of the system. For this purpose, a data acquisition system was programmed into the device under test and protected with a previously proposed design diversity redundancy technique. This technique implements different levels of diversity (architectural and temporal), by using two different architectures of converters (a ΣΔ converter and two successive approximation register (SAR) converters) operating with distinct sampling rates. The experiment was performed using a GTEM cell with the radiated signal varying from 80 MHz to 1 GHz, according to the IEC 61000-4-3 standard. Fields with intensity of 10 V/m, 30 V/m, 60 V/m and 100 V/m were applied, while recording the number of conversion errors of the three converters. This way, the individual susceptibility to EMI of each converter is evaluated, along with the behavior of the whole redundant system. Results show distinct susceptibility of each converter, with conversion errors starting to occur for fields of 30 V/m. For the highest tested field, the system presents hang failures for frequencies ranging from 125 MHz to 190 MHz. The redundant scheme is able to tolerate most of the observed conversion errors.