Applying CUDA Architecture to Accelerate Full Search Block Matching Algorithm for High Performance Motion Estimation in Video Encoding

• Published in: 2011 23rd International Symposium on Computer Architecture and High Performance Computing pp. 128 - 135
• Main Authors: Monteiro, E., Vizzotto, B., Diniz, C., Zatt, B., Bampi, S.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.10.2011
• Subjects: Accuracy; Algorithm design and analysis; Complexity theory; Computer architecture; CUDA; Encoding; GPU; Graphics processing unit; H.264/AVC; Motion estimation
• DOI: 10.1109/SBAC-PAD.2011.19
• ISBN: 9781457720505; 1457720507
• ISSN: 1550-6533

This work presents a parallel GPU-based solution for the Motion Estimation (ME) process in a video encoding system. We propose a way to partition the steps of Full Search block matching algorithm in the CUDA architecture. A comparison among the performance achieved by this solution with a theoretical model and two other implementations (sequential and parallel using OpenMP library) is made as well. We obtained a O(n^2/log^2n) speed-up which fits the proposed theoretical model considering different search areas. It represents up to 600x gain compared to the serial implementation, and 66x compared to the parallel OpenMP implementation.