TSV technology and challenges for 3D stacked DRAM

• Published in: 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers pp. 1 - 2
• Main Authors: Chang Yeol Lee, Sungchul Kim, Hongshin Jun, Kyung Whan Kim, Sung Joo Hong
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.06.2014
• Subjects: Maintenance engineering; Metals; Process control; Random access memory; Stacking; Three-dimensional displays; Through-silicon vias

A successful integration of Via-middle TSV process in DRAM technology with major process issues is introduced. Fast TSV open/short detection and how to trade-off in choice repair scheme is discussed. Process development for TSV volume shrink required to reduce dynamic power for driving TSV. Fast Cu...