Current carry capacity characterization for high performance system on chip packages
System on Chip (SoC) technology is rapidly evolved across high power workstations to low power tablets. As complex SoC further integrates several hardware functionalities, the system-level on-chip architecture is emerging as a significant source of power consumption. Improving current carry capacity...
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Published in | 2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC) pp. 1 - 3 |
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Main Authors | , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.12.2015
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Subjects | |
Online Access | Get full text |
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