OpenMDSP: Extending OpenMP to Program Multi-Core DSP
Multi-core Digital Signal Processors (DSP) are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing etc. Comparing with general purpose multi-processors, the multi-core DSPs normally have more complex memory hierarchy, such as on-chip co...
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Published in | 2011 International Conference on Parallel Architectures and Compilation Techniques pp. 288 - 297 |
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Main Authors | , , , , , |
Format | Conference Proceeding |
Language | English |
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IEEE
01.10.2011
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Abstract | Multi-core Digital Signal Processors (DSP) are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing etc. Comparing with general purpose multi-processors, the multi-core DSPs normally have more complex memory hierarchy, such as on-chip core-local memory and non-cache-coherent shared memory. As a result, it is very challenging to write efficient multi-core DSP applications. The current approach to program multi-core DSPs is based on proprietary vendor SDKs, which only provides low-level, non-portable primitives. While it is acceptable to write coarse-grained task level parallel code with these SDKs, it is very tedious and error prone to write fine-grained data parallel code with them. We believe it is desired to have a high-level and portable parallel programming model for multi-core DSPs. In this paper, we propose Open MDSP, an extension of Open MP designed for multi-core DSPs. The goal of Open MDSP is to fill the gap between Open MP memory model and the memory hierarchy of multi-core DSPs. We propose three class of directives in Open MDSP: (1) data placement directives allow programmers to control the placement of global variables conveniently, (2) distributed array directives divide whole array into sections and promote them into core-local memory to improve performance, and (3) stream access directives promote big array into core-local memory section by section during a parallel loop's processing. We implement the compiler and runtime system for Open MDSP on Free Scale MSC8156. Benchmarking result shows that seven out of nine benchmarks achieve a speedup of more than 5 with 6 threads. |
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AbstractList | Multi-core Digital Signal Processors (DSP) are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing etc. Comparing with general purpose multi-processors, the multi-core DSPs normally have more complex memory hierarchy, such as on-chip core-local memory and non-cache-coherent shared memory. As a result, it is very challenging to write efficient multi-core DSP applications. The current approach to program multi-core DSPs is based on proprietary vendor SDKs, which only provides low-level, non-portable primitives. While it is acceptable to write coarse-grained task level parallel code with these SDKs, it is very tedious and error prone to write fine-grained data parallel code with them. We believe it is desired to have a high-level and portable parallel programming model for multi-core DSPs. In this paper, we propose Open MDSP, an extension of Open MP designed for multi-core DSPs. The goal of Open MDSP is to fill the gap between Open MP memory model and the memory hierarchy of multi-core DSPs. We propose three class of directives in Open MDSP: (1) data placement directives allow programmers to control the placement of global variables conveniently, (2) distributed array directives divide whole array into sections and promote them into core-local memory to improve performance, and (3) stream access directives promote big array into core-local memory section by section during a parallel loop's processing. We implement the compiler and runtime system for Open MDSP on Free Scale MSC8156. Benchmarking result shows that seven out of nine benchmarks achieve a speedup of more than 5 with 6 threads. |
Author | Wenguang Chen Weimin Zheng Jiangzhou He Zhizhong Tang Guangri Chen Handong Ye |
Author_xml | – sequence: 1 surname: Jiangzhou He fullname: Jiangzhou He email: hejz07@mails.tsinghua.edu.cn organization: Tsinghua Nat. Lab. for Inf. Sci. & Technol. (TNList), Tsinghua Univ., Beijing, China – sequence: 2 surname: Wenguang Chen fullname: Wenguang Chen email: cwg@tsinghua.edu.cn organization: Tsinghua Nat. Lab. for Inf. Sci. & Technol. (TNList), Tsinghua Univ., Beijing, China – sequence: 3 surname: Guangri Chen fullname: Guangri Chen email: chenguangri@huawei.com organization: Huawei Technol. Co. Ltd., Shenzhen, China – sequence: 4 surname: Weimin Zheng fullname: Weimin Zheng email: zwm-dcs@tsinghua.edu.cn organization: Tsinghua Nat. Lab. for Inf. Sci. & Technol. (TNList), Tsinghua Univ., Beijing, China – sequence: 5 surname: Zhizhong Tang fullname: Zhizhong Tang email: tzz-dcs@tsinghua.edu.cn organization: Tsinghua Nat. Lab. for Inf. Sci. & Technol. (TNList), Tsinghua Univ., Beijing, China – sequence: 6 surname: Handong Ye fullname: Handong Ye email: hye@huawei.com organization: Huawei Technol. Co. Ltd., Shenzhen, China |
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SubjectTerms | Arrays data parallelism Digital signal processing Instruction sets LTE multi-core DSP Multicore processing OpenMP Parallel processing Programming System-on-a-chip |
Title | OpenMDSP: Extending OpenMP to Program Multi-Core DSP |
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