Diagrammatic Functional Description of Microprocessor and Data-Flow Processor
This paper discusses a description technique for various kinds of processors. This technique is based on the Symbolic Functional Description Language, which allows logic designers to describe the behavior of hardwares at the register-transfer level in the top-down approach. The SFDL has been applied...
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Published in | 22nd ACM/IEEE Design Automation Conference pp. 731 - 734 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
1985
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Subjects | |
Online Access | Get full text |
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Summary: | This paper discusses a description technique for various kinds of processors. This technique is based on the Symbolic Functional Description Language, which allows logic designers to describe the behavior of hardwares at the register-transfer level in the top-down approach. The SFDL has been applied to the description of the internal behavior of a microprocessor and a data-flow processor. As a result, the SFDL has made it possible to describe the instruction set and the behavior of processors correctly in comprehensible diagrams. The SFDL has been proved to be suitable for the description of data-flow processors. |
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ISBN: | 0818606355 9780818606359 |
ISSN: | 0738-100X |
DOI: | 10.1109/DAC.1985.1586024 |