A graph based algorithm for optimal buffer insertion under accurate delay models

• Published in: Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001 pp. 535 - 539
• Main Author: Youxin Gao
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2001
• Subjects: Delay effects; Integrated circuit interconnections; Polynomials; Propagation delay; Shortest path problem; SPICE; Time factors; Transmission lines; Very large scale integration; Wire

Buffer insertion is an efficient technique in interconnect optimization. This paper presents a graph based algorithm for optimal buffer insertion under accurate delay models. In our algorithm, a signal is accurately represented by a finite ramp which is characterized by two parameters, shift time an...