A Review of Near-Memory Computing Architectures: Opportunities and Challenges

• Published in: 2018 21st Euromicro Conference on Digital System Design (DSD) pp. 608 - 617
• Main Authors: Singh, Gagandeep, Chelini, Lorenzo, Corda, Stefano, Javed Awan, Ahsan, Stuijk, Sander, Jordans, Roel, Corporaal, Henk, Boonstra, Albert-Jan
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.08.2018
• Subjects: application characterization; Central Processing Unit; Coherence; computer architecture; data centric computing; Graphics processing units; Memory management; modeling; near data processing; near-memory computing; processing in memory; Programming; survey
• DOI: 10.1109/DSD.2018.00106

The conventional approach of moving stored data to the CPU for computation has become a major performance bottleneck for emerging scale-out data-intensive applications due to their limited data reuse. At the same time, the advancement in integration technologies have made the decade-old concept of coupling compute units close to the memory (called Near-Memory Computing) more viable. Processing right at the "home" of data can completely diminish the data movement problem of data-intensive applications. This paper focuses on analyzing and organizing the extensive body of literature on near-memory computing across various dimensions: starting from the memory level where this paradigm is applied, to the granularity of the application that could be executed on the near-memory units. We highlight the challenges as well as the critical need of evaluation methodologies that can be employed in designing these special architectures. Using a case study, we present our methodology and also identify topics for future research to unlock the full potential of near-memory computing.