APA (7th ed.) Citation

Fujii, T., Toi, T., Tanaka, T., Togawa, K., Kitaoka, T., Nishino, K., . . . Motomura, M. (2018, June). New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications. 2018 IEEE Symposium on VLSI Circuits, 41-42. https://doi.org/10.1109/VLSIC.2018.8502438

Chicago Style (17th ed.) Citation

Fujii, Taro, Takao Toi, Teruhito Tanaka, Katsumi Togawa, Toshiro Kitaoka, Kengo Nishino, Noritsugu Nakamura, Hiroki Nakahara, and Masato Motomura. "New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications." 2018 IEEE Symposium on VLSI Circuits Jun. 2018: 41-42. https://doi.org/10.1109/VLSIC.2018.8502438.

MLA (9th ed.) Citation

Fujii, Taro, et al. "New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications." 2018 IEEE Symposium on VLSI Circuits, Jun. 2018, pp. 41-42, https://doi.org/10.1109/VLSIC.2018.8502438.