An Efficient Implementation of the One-Dimensional Hough Transform Algorithm for Circle Detection on the FPGA

• Published in: 2014 Second International Symposium on Computing and Networking pp. 447 - 452
• Main Authors: Xin Zhou, Ito, Yasuaki, Nakano, Koji
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.12.2014
• Subjects: Circles detection; Clocks; Computer architecture; Edge image; Embedded block RAMs; Embedded DSP slices; Field programmable gate arrays; FPGA; Hough transform; Image edge detection; Random access memory; Registers; Transforms
• ISSN: 2379-1888
• DOI: 10.1109/CANDAR.2014.32

The main contribution of this paper is to present an efficient implementation of the Hough transform algorithm that uses only one-dimensional parameter spaces for circles detection on a Xilinx Virtex-7 FPGA. We implemented the circuit using 398 DSP48E1 slices and 309 block RAMs with 18Kbits. The experimental results show that the architecture runs in 181.812MHz. For an edge image of size 400 × 400, our circuit can perform in at most 970434 clock cycles, i.e., 5337.568μs. Our implementation attains a speed-up factor of approximately 189 over the sequential implementation on the CPU.