Labrado, C., Thapliyal, H., & DeMara, R. F. (2015, December). Design of Testable Adder Circuits for Spintronics Based Nanomagnetic Computing. 2015 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), 107-111. https://doi.org/10.1109/iNIS.2015.27
Chicago Style (17th ed.) CitationLabrado, Carson, Himanshu Thapliyal, and Ronald F. DeMara. "Design of Testable Adder Circuits for Spintronics Based Nanomagnetic Computing." 2015 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) Dec. 2015: 107-111. https://doi.org/10.1109/iNIS.2015.27.
MLA (9th ed.) CitationLabrado, Carson, et al. "Design of Testable Adder Circuits for Spintronics Based Nanomagnetic Computing." 2015 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), Dec. 2015, pp. 107-111, https://doi.org/10.1109/iNIS.2015.27.