CompEx: Compression-expansion coding for energy, latency, and lifetime improvements in MLC/TLC NVM

• Published in: Proceedings - International Symposium on High-Performance Computer Architecture pp. 90 - 101
• Main Authors: Palangappa, Poovaiah M., Mohanram, Kartik
• Format: Conference Proceeding Journal Article
• Language: English
• Published: IEEE 01.03.2016
• Subjects: Benchmark testing; Codecs; Coding; Compressing; Compression tests; Dynamic random access memory; Encoding; Interprocessor communication; Logic; Memory management; Nonvolatile memory; Programming; Random access memory; Resistance

Multi-level/triple-level cell non-volatile memories (MLC/TLC NVMs) such as PCM and RRAM are the subject of active research and development as replacement candidates for DRAM, which is limited by its high refresh power and poor scaling potential. Besides the benefits of non-volatility (low refresh po...