Impact of Wafer Pre-thin Thickness on Stealth Dicing Performance

Stealth dicing (SD) is a low-cost and precise semiconductor assembly process that induces subsurface damage with infrared light to separate wafer into individual dies. Pre-thinning is a critical step that reduces wafer thickness and stress, enhancing efficiency and lowering defect risks before SD pr...

Full description

Saved in:
Bibliographic Details
Published in2023 IEEE 25th Electronics Packaging Technology Conference (EPTC) pp. 701 - 704
Main Authors Lim, Dao Kun, Vempaty, Venkata Rama Satya Pradeep, Sim, Wen How, Singh, Harjashan Veer
Format Conference Proceeding
LanguageEnglish
Published IEEE 05.12.2023
Subjects
Absorption
Data models
Laser modes
Semiconductor device modeling
Semiconductor lasers
Simulation
Temperature distribution
Online AccessGet full text
DOI10.1109/EPTC59621.2023.10457881

Cover

More Information
Summary:Stealth dicing (SD) is a low-cost and precise semiconductor assembly process that induces subsurface damage with infrared light to separate wafer into individual dies. Pre-thinning is a critical step that reduces wafer thickness and stress, enhancing efficiency and lowering defect risks before SD process. However, wafer pre-thin thickness might impact temperature and stress distribution during the laser absorption and internal crack propagation, subsequently affecting the dicing performance. In this study, the impact of wafer pre-thin thickness on the SD performance was evaluated through the simulation model and fracture analysis for SD process. This provides better understanding and insight on the dicing performance with the change in wafer pre-thin thickness.
DOI:10.1109/EPTC59621.2023.10457881