Side-Channel Attacks on Triple Modular Redundancy Schemes

• Published in: 2021 IEEE 30th Asian Test Symposium (ATS) pp. 79 - 84
• Main Authors: Almeida, Felipe, Aksoy, Levent, Raik, Jaan, Pagliarini, Samuel
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.11.2021
• Subjects: advanced encryption standard; Data models; Encryption; Fault tolerant systems; Integrated circuits; Power dissipation; Redundancy; Side-channel attacks; triple modular redundancy

Triple Modular Redundancy (TMR) is a well-known fault tolerance technique for avoiding errors in the Integrated Circuits (ICs) and it has been used in a wide range of applications. The TMR technique employs three instances of circuits realizing concurrently the same functionality whose outputs are c...