A Comprehensive Trade-off Analysis on the CCSDS 131.2-B-1 Extended ModCod (SCCC-X) Implementation

• Published in: 2020 23rd Euromicro Conference on Digital System Design (DSD) pp. 126 - 132
• Main Authors: Bertolucci, Matteo, Falaschi, Francesco, Cassettari, Riccardo, Davalle, Daniele, Fanucci, Luca
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.08.2020
• Subjects: CCSDS 131.2-B; Extended ModCods; IP networks; Microsemi RTG4; Modulation; Payloads; SCCC; SCCC-X; Telemetry; Throughput; Transmitters; Xilinx Kintex 7 Ultrascale
• DOI: 10.1109/DSD51259.2020.00030

Following the expansion of the industry requiring small satellites with payloads producing high data rates, the Consultative Committee for Space Data Systems (CCSDS) introduced the CCSDS 131.2-B-1 standard in 2012. The standard combines Serially Concatenated Convolutional Codes (SCCC) with different types of modulation to provide a cost-effective, reliable and efficient payload data transmitter with a high degree of flexibility. This flexibility, due to the number of modulation and coding formats (ModCod), can help designers to better adapt the system configuration to the specific needs of the target. In addition, the use of Adaptive Code and Modulation (ACM) provides the means to adapt payload data transmission to variable channel conditions. To further increase flexibility, the "EGRET - Next Generation High Rate Telemetry" project has recently defined a proposal to extend the CCSDS SCCC standard to include more efficient transmission schemes. This extension, also called SCCC-X, introduces 10 new ModCods together with a new SCCC-BCH combined encoder and new higher-order modulations (128-APSK and 256-APSK). This document illustrates the entire transmission chain architecture of the SCCC-X telemetry transmitter, highlighting the possible design trade-offs in order to provide a reference for other future developers. Special attention is paid to the analysis of implementation compromises in terms of Bit Error Rate (BER) loss, efficiency, throughput, and source occupation on relevant space-grade FPGAs. In particular, the synthesis results show that SCCC-X can be implemented without changes in the critical path compared to CCSDS 131.2-B-1 and that the implementations are able to achieve more than 450MSym/s on the Xilinx Space-Grade Kintex 7 Ultrascale FPGA and more than 250Msym/s on the Microsemi RTG4 FPGA.