Wave Digital Emulation of a Memristive Circuit to Find the Minimum Spanning Tree

• Published in: Conference proceedings : Midwest Symposium on Circuits and Systems pp. 351 - 354
• Main Authors: Ochs, Karlheinz, Michaelis, Dennis, Solan, Enver
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.08.2019
• Subjects: Biological neural networks; Convergence; Emulation; Integrated circuit modeling; Memristors; Task analysis; Topology
• ISSN: 1558-3899
• DOI: 10.1109/MWSCAS.2019.8884878

Self-organizing circuits are subject to current research because they are known to solve computationally complex tasks fast, energy efficient and can be implemented in integrated circuits with minimum space requirements. This is especially desired in contexts where the problem involves many components, such as neural networks, and the solution demands exhaustive computational effort. Networks which are centered around memristors have shown to be good candidates for such self-organizing, circuit-inspired solutions. One of many interesting problems include finding the minimum spanning tree in a graph, as it has applications in human learning in the context of the self-organizing discovery of information transport and hence topology formation. This work presents a memristive circuit to solve the minimum spanning tree in a directed, weighted graph of arbitrary size. Since the manufacturing process of memristors is generally complicated and costly, a software emulator based on wave digital principles is derived which provides a powerful tool for investigations with different memristor models to aid development processes.