Low RA Magnetic Tunnel Junction Arrays in Conjunction with Low Switching Current and High Breakdown Voltage for STT-MRAM at 10 nm and Beyond - Park, C.; Lee, H.; Ching, C.; Ahn, J.; Wang, R.; Pakala, M.; Kang, S. H. (2018 IEEE Symposium on VLSI Technology, 2018)
The scaling of STT-MRAM for deeply scaled nodes (e.g. sub-10 nm CMOS) requires low resistance-area-product (RA) magnetic tunnel junctions (MTJs) to contain switching voltage (V c ) and to assure high endurance. In contrast to various reports, we demonstrate systematic engineering of low-RA MTJs without trading off key device attributes and remarkably, with higher barrier reliability. The MTJs integrate an ultra-thin synthetic antiferromagnetic layer (tSAF) with a Co/Pt pseudo-alloy pinned layer. By reducing RA from 10 to 5 Ωµm 2 , significantly reduced V c and reliable switching at 5 ns have been achieved. Furthermore, the breakdown voltage (V BD ) has been improved. The results suggest that the tunability of MTJ is extended to sub-10 nm CMOS for high-performance and high-reliability MRAM.