Study of N-Detectability in QCA Designs

• Published in: 2006 15th Asian Test Symposium pp. 183 - 188
• Main Author: Sikdar, B.K.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.11.2006
• Subjects: Circuit analysis; Circuit faults; CMOS logic circuits; Fault diagnosis; gate; Logic circuits; Majority; N-detectability; Quantum cellular automata; Quantum dots; Quantum-Dot Cellular Automata; Semiconductor device modeling; Testing; Testing of QCA designs; Very large scale integration
• ISBN: 9780769526287; 0769526284
• ISSN: 1081-7735
• DOI: 10.1109/ATS.2006.261018

QCA (quantum dot cellular automata) are projected as the replacement of state-of-the-art CMOS designs. The wide acceptance of QCA based design of logic circuits demands analysis and estimation of defect coverage in such circuits. Conventional single stuck-at fault model has been commonly employed to identify the majority of defects at the logic level. However, stuck-at fault model may not fully capture the defects in QCA based designs but approximates the defects in such designs. This work evaluates the effectiveness of such state-of-the-art VLSI test mechanisms, and investigates the possibility of more defect coverage through N-detectability in QCA designs. An experimental set up has been created to study the test quality of such designs subject to a PRPG (pseudo-random-pattern generator). The results shown in the paper point to the fact that the conventional test technique for CMOS designs is also effective in QCA based designs