Embedded flash testing: overview and perspectives - Ginez, O.; Daga, J.-M.; Girard, P.; Landrault, C.; Pravossoudovitch, S.; Virazel, A. (2006 International Conference on Design & Test of Integrated Systems in Nanoscale Technology : IEEE DTIS 2006 : September 05-07, 2006, Tunis, Tunisia : proceedings, 2006)
The evolution of system-on-chip (SoC) designs involves the development of non-volatile memory technologies like flash. Embedded flash (eFlash) memories are based on the floating-gate transistor concept and can be subject to complex hard defects creating functional faults. In this paper, we present a complete analysis of a particular failure mechanism, referred as disturb phenomenon. Moreover, we analyze the efficiency of a particular test sequence to detect this disturb phenomenon. Finally we conclude on the interest to develop new test infrastructure well adapted to the eFlash environment