Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages
A novel approach to assessing the effects of CPI-induced stresses on performance and durability of ICs with 2.5D/3D chip architectures is presented. It combines the physics-based stress modeling methodology with the capabilities of layout analysis and extraction tools. The developed stress simulatio...
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Published in | 2019 IEEE International Reliability Physics Symposium (IRPS) pp. 1 - 7 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.03.2019
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Subjects | |
Online Access | Get full text |
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Summary: | A novel approach to assessing the effects of CPI-induced stresses on performance and durability of ICs with 2.5D/3D chip architectures is presented. It combines the physics-based stress modeling methodology with the capabilities of layout analysis and extraction tools. The developed stress simulation flow takes into account stress variations existing in different scales from the package macro-scale to interconnect segment and transistor nano-scales. An impact of the feature-scale variations of design patterns on the stress distribution is demonstrated. The obtained across-chip deformation field is used for calculating the variations in transistors' electrical characteristics, and for analysis of potential cracking locations in the interconnect layers. |
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ISSN: | 1938-1891 |
DOI: | 10.1109/IRPS.2019.8720471 |