A CMOS front-end architecture for hard-disk drive read-channel equalizer

The functional characteristics and design challenges associated with the different building blocks of a CMOS front-end architecture for hard disk drive read-channel equalizer are presented. These include the mixed-signal design of a variable gain amplifier, a continuous-time low-pass filter, data co...

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Bibliographic Details
Published in2005 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 2184 - 2187 Vol. 3
Main Authors Ndjountche, T., Fa-Long Luo, Bobda, C.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2005
Subjects
Circuit noise
Clocks
Computer architecture
Equalizers
Gain
Hard disks
Low pass filters
Power dissipation
Power system modeling
Semiconductor device modeling
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Summary:The functional characteristics and design challenges associated with the different building blocks of a CMOS front-end architecture for hard disk drive read-channel equalizer are presented. These include the mixed-signal design of a variable gain amplifier, a continuous-time low-pass filter, data converters and clock generation and recovery circuits. With a realistic computer model of the system, the analysis of structural variations and effects of component nonidealities becomes feasible. Numerical results show that circuit techniques that minimize sensitivity to power-supply and substrate noise, while maintaining the power dissipation and parameter tuning range are critical.
ISBN:9780780388345
0780388348
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2005.1465054