A study on package stacking process for package-on-package (PoP) - Yoshida, A.; Taniguchi, J.; Murata, K.; Kada, M.; Yamamoto, Y.; Takagi, Y.; Notomi, T.; Fujita, A. (56th Electronic Components and Technology Conference 2006, 2006)
This paper outlines package stacking process guidelines for a package-on-package (PoP) configuration. PoP stacks currently in production or development consist of a bottom package containing a high performance logic device designed to receive a mating top package typically containing high capacity or combination memory devices. System manufactures achieve lowest cost and maximum logistical benefits, when these two components are sourced from different IC device suppliers then stacked in the final board assembly flow. Thus, the package stacking process is a key technology in order for system manufacturers to be able to select the top and bottom components from various suppliers. This is because each package may have a different warpage trend from room temperature to reflow temperature. In this study, Sharp's chip scale package (top CSP) was mounted on Amkor's bottom CSP to enable package stacking in order to know if packages from two suppliers can get a good solder joint after stacking. The top package is 152 balls CSP with 0.65mm pitch, and a 2-row format. The bottom CSP is 352 balls with 0.5mm pitch and a 4-row format. In both cases, the package size is 14mm times 14mm. Flux and solder paste provided by Senju metal industry were tested to stack the packages and mount them on test boards using a multifunctional placement machine manufactured by Panasonic factory solutions. While selecting the top package with minimum warpage, both at room and reflow temperature, we varied the warpage amount from 50 to 150 mum for the bottom package by changing the die size and then investigating the solder joint. The result showed that even in the case where the bottom package had large warpage, the solder joint of the top-to-bottom package was well formed by the fluxing process. However, we observed open solder joints between the bottom package and the test board when the conventional screen printing method was used. Prior to the board mounting, we applied the solder paste dipping process to the solder ball of the bottom package. This solder paste was newly developed to optimize rheology and powder size for package stacking. Using the solder paste dipping process, the solder joint yield was much improved even when the bottom package was warped. Using this solder paste dipping process for the top package, the same effect will be expected if the top package has a large warpage