Spray coating of photoresist for realizing through-wafer interconnects

• Published in: 2006 8th Electronics Packaging Technology Conference pp. 831 - 836
• Main Authors: Pham, N.P., Bulcke, M.V., De Moor, P.
• Format: Conference Proceeding
• Language: English
• Published: 01.12.2006
• Subjects: Coatings; Dielectrics; Dry etching; Integrated circuit interconnections; Metallization; Resists; Silicon; Spraying; Surface topography; Wet etching
• DOI: 10.1109/EPTC.2006.342820
• ISBN: 9781424406647; 1424406641

Three dimensional (3D) integration requires a through-wafer interconnects, i.e. an integration of electrical connection from one side of the wafer to the other side. In some cases, it involves the lithographic patterning over high topography. For this step, a conformal coating of resist layer is necessary. In this paper, a spray coating process of AZ4562 resist has been investigated. The process is developed in an EVG 101 system on 200mm wafers. Parameters of the spray process such as resist solution, nozzle scanning speed and dispense rate have been studied to find out the proper process for the application of through-wafer interconnects. Some limitations for patterning inside the vias such as flowing of resist, resolution loss of pattern are also discussed and solutions to overcome these limitations are proposed.