Contention-Tolerant Crossbar Packet Switches without and with Speedup

We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the crossbar with crosspoint buffers, which require complex hardware resolvers to grant one out of multiple output requests, CTC(N) can tolerate ou...

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Published in2010 IEEE International Conference on Communications pp. 1 - 6
Main Authors Guannan Qu, Hyung Jae Chang, Jianping Wang, Zhiyi Fang, Zheng, S Q
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2010
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Abstract We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the crossbar with crosspoint buffers, which require complex hardware resolvers to grant one out of multiple output requests, CTC(N) can tolerate output contentions by a pipelining mechanism, with pipeline stages implemented as buffers in input ports. These buffers are used to decouple the scheduling task into N independent parts in such a way that N schedulers are located in N input ports, and they operate independently and in parallel. Without using arbiters and/or crosspoint buffers that require additional chip area, the CTC(N) switch is more scalable than existing crossbars. We analyze the throughput of CTC(N) switch without and with internal speedup by building a queuing model. We show that, under Bernoulli i.i.d. uniform traffic, CTC(N) without internal speedup has worst-case throughput of 63%, and CTC(N) achieves 100% throughput with internal speedup 2. Our simulation results validate our theoretical analysis.
AbstractList We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the crossbar with crosspoint buffers, which require complex hardware resolvers to grant one out of multiple output requests, CTC(N) can tolerate output contentions by a pipelining mechanism, with pipeline stages implemented as buffers in input ports. These buffers are used to decouple the scheduling task into N independent parts in such a way that N schedulers are located in N input ports, and they operate independently and in parallel. Without using arbiters and/or crosspoint buffers that require additional chip area, the CTC(N) switch is more scalable than existing crossbars. We analyze the throughput of CTC(N) switch without and with internal speedup by building a queuing model. We show that, under Bernoulli i.i.d. uniform traffic, CTC(N) without internal speedup has worst-case throughput of 63%, and CTC(N) achieves 100% throughput with internal speedup 2. Our simulation results validate our theoretical analysis.
Author Zheng, S Q
Zhiyi Fang
Hyung Jae Chang
Jianping Wang
Guannan Qu
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  organization: Dept. of Comput. Sci., Univ. of Texas at Dallas, Richardson, TX, USA
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  surname: Jianping Wang
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  organization: Dept. of Comput. Sci., City Univ. of Hong Kong, Hong Kong, China
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  organization: Dept. of Comput. Sci., Univ. of Texas at Dallas, Richardson, TX, USA
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Snippet We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the...
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SubjectTerms Communications Society
Computer science
Delay
Hardware
Packet switching
Pipeline processing
Quality of service
Scheduling algorithm
Switches
Throughput
Title Contention-Tolerant Crossbar Packet Switches without and with Speedup
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