Logic Process Compatible 40NM 16MB, Embedded Perpendicular-MRAM with Hybrid-Resistance Reference, Sub-μA Sensing Resolution, and 17.5NS Read Access Time

A new MRAM reference and sensing circuit that can achieve <; ±1μA resolution and 17.5nS read access from -40C to 125C is presented in this paper. A trimmable current-mode latch-type sense amplifier (CLSA) with hybrid-resistance-reference (HRR) and cell location compensation is proposed to resolve...

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Published in2018 IEEE Symposium on VLSI Circuits pp. 79 - 80
Main Authors Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Ku-Feng Lin, Ta-Ching Yeh, Hung-Chang Yu, Chuang, Harry, Yu-Der Chih, Chang, Jonathan
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2018
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DOI10.1109/VLSIC.2018.8502260

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Summary:A new MRAM reference and sensing circuit that can achieve <; ±1μA resolution and 17.5nS read access from -40C to 125C is presented in this paper. A trimmable current-mode latch-type sense amplifier (CLSA) with hybrid-resistance-reference (HRR) and cell location compensation is proposed to resolve small read window of MRAM. Silicon data measurement is presented to demonstrate a logic-process compatible, fully functional 16Mb perpendicular MRAM in 40nm CMOS process.
DOI:10.1109/VLSIC.2018.8502260