APA (7th ed.) Citation

Mehta, A., Chen, Y., Menezes, N., Wong, D., & Pilegg, L. (1997). Clustering and load balancing for buffered clock tree synthesis. Proceedings International Conference on Computer Design VLSI in Computers and Processors, 217-223. https://doi.org/10.1109/ICCD.1997.628871

Chicago Style (17th ed.) Citation

Mehta, A.D, Yao-Ping Chen, N. Menezes, D.F Wong, and L.T Pilegg. "Clustering and Load Balancing for Buffered Clock Tree Synthesis." Proceedings International Conference on Computer Design VLSI in Computers and Processors 1997: 217-223. https://doi.org/10.1109/ICCD.1997.628871.

MLA (9th ed.) Citation

Mehta, A.D, et al. "Clustering and Load Balancing for Buffered Clock Tree Synthesis." Proceedings International Conference on Computer Design VLSI in Computers and Processors, 1997, pp. 217-223, https://doi.org/10.1109/ICCD.1997.628871.