Design and Implementation of Integrated Circuits Using Enhanced Grey Swarm Optimized Artificial Neural Network
This work introduces computer-aided design (CAD) software that can automatically design and optimise Integrated Circuit (IC). To determine the device sizes that maximise performance goals by using artificial neural networks (ANNs). To accelerate the performance of ANN by using enhanced grey swarm op...
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Published in | 2023 4th International Conference on Smart Electronics and Communication (ICOSEC) pp. 769 - 773 |
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Main Author | |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
20.09.2023
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Subjects | |
Online Access | Get full text |
DOI | 10.1109/ICOSEC58147.2023.10276173 |
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Abstract | This work introduces computer-aided design (CAD) software that can automatically design and optimise Integrated Circuit (IC). To determine the device sizes that maximise performance goals by using artificial neural networks (ANNs). To accelerate the performance of ANN by using enhanced grey swarm optimization (EGSO). As neural networks can learn and generalise from data, they may be used to create the model even if the formulae for the individual components are not accessible. The TSMC 0.18\ \mu\mathrm{m} CMOS process parameters were used in the HSPICE design environment to generate the training data. One real-world application is provided a CMOS technology of 0.18\ \mu\mathrm{m} to demonstrate the tool's effectiveness. The simulation results show the viability of the suggested strategy for sizing integrated circuits. The novel integrated circuit optimization system may employ parallel computing to optimise faster than the standard method. |
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AbstractList | This work introduces computer-aided design (CAD) software that can automatically design and optimise Integrated Circuit (IC). To determine the device sizes that maximise performance goals by using artificial neural networks (ANNs). To accelerate the performance of ANN by using enhanced grey swarm optimization (EGSO). As neural networks can learn and generalise from data, they may be used to create the model even if the formulae for the individual components are not accessible. The TSMC 0.18\ \mu\mathrm{m} CMOS process parameters were used in the HSPICE design environment to generate the training data. One real-world application is provided a CMOS technology of 0.18\ \mu\mathrm{m} to demonstrate the tool's effectiveness. The simulation results show the viability of the suggested strategy for sizing integrated circuits. The novel integrated circuit optimization system may employ parallel computing to optimise faster than the standard method. |
Author | Bhalla, Anubhav |
Author_xml | – sequence: 1 givenname: Anubhav surname: Bhalla fullname: Bhalla, Anubhav email: anubhav.bhalla.orp@chitkara.edu.in organization: Centre for Interdisciplinary Research in Business and Technology, Chitkara University Institute of Engineering and Technology, Chitkara University,Punjab,India |
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Snippet | This work introduces computer-aided design (CAD) software that can automatically design and optimise Integrated Circuit (IC). To determine the device sizes... |
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SubjectTerms | Artificial neural networks CMOS process computer-aided design (CAD) Design automation Enhanced Grey Swarm Optimized Artificial Neural Network (EGSO-ANN) Integrated Circuits (ICs) Parallel processing Performance evaluation Simulation Training data |
Title | Design and Implementation of Integrated Circuits Using Enhanced Grey Swarm Optimized Artificial Neural Network |
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