A Heterogeneous Design Method for Reconfigurable Cryptographic Computing Array

• Published in: 2023 International Conference on Networks, Communications and Intelligent Computing (NCIC) pp. 9 - 17
• Main Authors: Fan, Wang, Liu, Qinrang, Gao, Yanzhao, Qi, Xiaofeng, Wang, Xuan, Yang, Heng
• Format: Conference Proceeding
• Language: English
• Published: IEEE 17.11.2023
• Subjects: Computer architecture; cryptographic processors; Design methodology; Hardware; Heterogeneous design; Parallel processing; Pipelines; Program processors; reconfigurable computing; Space exploration
• DOI: 10.1109/NCIC61838.2023.00008

With the development of information technology, the traditional computing architecture can hardly meet the demand of cryptographic computing for flexibility, performance, and security. Nowadays, reconfigurable cryptographic processors have become the mainstream solution to implement cryptographic computing. Since the existing studies have such issues as hardware resource waste and over-design in computing arrays of processors, we proposed a heterogeneous design method HDCCA (Heterogeneous design of cryptographic computing array) for computing array; Specifically, HDCCA establishes the connection between algorithms and performance, area, and power of the array by mapping and improves the NSGA2 to search the minimum path to meet the computing requirements of cryptographic algorithms. The experimental results show that the solution generated by HDCCA can achieve an area and power saving of more than 10% compared with the homogeneous array and the area efficiency and power efficiency are both improved.